I. Field of the Invention
The present invention relates to a semiconductor device which has a structure suitable for arranging memory cells with high density which can be used in a semiconductor memory device such as a static random access memory (S-RAM).
II. Description of the Prior Art
The need for higher packing density and lower power consumption is becoming more and more imperative in semiconductor memory devices. In order to achieve this purpose, it has been proposed to form a high specific resistance polycrystalline silicon layer through an insulation layer overlying a transistor used as a driver, i.e. a driver transistor as a load resistor of an inverter comprising an insulating gate type driver transistor. By forming a polycrystalline silicon layer as a load resistance overlying a driver transistor, another driver transistor may, for example, be formed on that part of the surface of the semiconductor chip which is usually occupied by the polycrystalline silicon layer, so that the area of an individual memory cell may be reduced and memory cells may be formed with higher density on the semiconductor chip.
However, with this construction, a parasitic capacitance is generated between the gate electrode of the driver transistor and the polycrystalline silicon load resistor so that there is a time lag in the switching speed of the inverter. When an S-RAM is manufactured with the above-proposed structure, it becomes extremely difficult to balance the parasitic capacitance generated between the gate electrode of one of the driver transistors of a flip-flop functioning as a memory cell and the polycrystalline silicon layer as a load of the one of the driver transistors, and the parasitic capacitance generated between the gate electrode of the other transistor and the polycrystalline silicon layer as a load. For balancing the capacitance, the alignment of a mask must be made with high precision during the manufacturing procedure, resulting in degradation of yield and high manufacturing cost.
It is, therefore, the primary object of the present invention to provide a semiconductor device which may be packed with high density, which has a lower power consumption and which may enable operation at high speed.